1. Field of the Invention
The subject matter of the present invention is directed to a method for the simultaneous double-side grinding of a plurality of semiconductor wafers, wherein each semiconductor wafer lies such that it is freely moveable in a cutout of one of a plurality of carriers caused to rotate by means of a rolling apparatus and is thereby moved on a cycloidal trajectory, wherein the semiconductor wafers are machined in material-removing fashion between two rotating working disks, wherein each working disk comprises a working layer containing bonded abrasive. The subject matter of the invention is also a semiconductor wafer having outstanding flatness which can be produced by means of the method.
2. Background Art
Electronics, microelectronics and microelectromechanics require as starting materials (substrates), semiconductor wafers with extreme requirements for global and local flatness, single-side-referenced local flatness (nanotopology), roughness, and cleanliness. Semiconductor wafers are wafers made of semiconductor materials, in particular compound semiconductors such as gallium arsenide, and particularly elemental semiconductors such as silicon and occasionally germanium. If necessary, layer structures are provided on the semiconductor wafers before they are used for producing components. Layer structures are, e.g., a device-carrying silicon upper layer on an insulator (“silicon on insulator”, SOI), or a strained silicon-germanium layer (“strained silicon”) on a silicon wafer or combinations of the two (“strained silicon on insulator”, sSOI).
In accordance with the prior art, semiconductor wafers are produced in a multiplicity of successive process steps which can generally be classified into the following groups:    a) production of a monocrystalline semiconductor ingot (crystal growth);    b) separation of the ingot into individual wafers;    c) mechanical machining;    d) chemical machining;    e) chemomechanical machining; and    f) when necessary, production of layer structures.
The combination of the individual steps allotted to the groups, as well as their order, may vary depending on the intended application. A multiplicity of secondary steps such as cleaning, sorting, measuring, packaging, etc. are furthermore used.
Mechanical machining serves to remove undulations that arose during the preceding separation of the semiconductor ingot, for example as a result of thermal drift over a long duration of separation or dynamic self-dressing and -blunting processes. Furthermore, mechanical machining serves for the removal of the surface layer damaged in crystalline fashion by the rough sawing process, and for reduction of the surface roughness. Primarily, however, mechanical machining is used for global leveling of the semiconductor wafer. Various techniques are used in accordance with the prior art, for example, lapping (double-side plane lapping using free abrasive grain), single-side grinding using a cup grinding disk (“single-side grinding”, SSG), or simultaneous double-side grinding between two cup grinding disks on the front and rear sides simultaneously (“double-disk grinding”, DDG).
DE 10344602 A1 describes a method which combines the kinematics known from lapping and constrained-force-free guidance with the advantages of bonded abrasive grain. In this case, the semiconductor wafers are generally moved with a plurality of carriers between an upper and a lower working disk. The two working disks have an abrasive cloth applied to them, by way of example. As in the case of a lapping machine, the carriers, which in each case have a plurality of cutouts for receiving the semiconductor wafers, are in engagement with a rolling apparatus, comprising an inner and an outer drive ring, via a toothed ring, and are caused to effect a rotary movement about their axis and about the axis of the drive rings by means of the apparatus, such that the semiconductor wafers describe cycloidal paths relative to the working disks which likewise rotate about their axis.
It has been found, however, that the semiconductor wafers machined by this method have a series of defects, with the result that the wafers are unsuitable for particularly demanding applications. It has been shown, for example, that generally semiconductor wafers are produced with a disadvantageous convex thickness profile and a pronounced edge roll-off. The semiconductor wafers also often have irregular undulations in their thickness profile and also a rough surface with a large damage depth. Damage depth should be understood to mean the depth, calculated from the surface of the semiconductor wafer, to which the crystal lattice was damaged, i.e. disturbed, by the machining.
Rough semiconductor wafers with large damage depth require complex remachining that nullifies the advantages of the method disclosed in DE 10344602 A1. It is virtually impossible or possible only with high outlay to convert convex semiconductor wafers into the desired plane-parallel target form by means of the customary chemical and chemomechanical subsequent machining. The remaining convexity and edge roll-off lead to incorrect exposures during photolithographic device patterning and hence to the failure of the components. Semiconductor wafers of this type are therefore unsuitable for demanding applications.